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EV6R11 KIT
Schematic Diagram:
P1 pins
P1-1
GND
P1-9 N/C
P1-2
P1-3
HIN
LIN
P1-10 +VCL
P1-11 +VCL
P1
P1-4
P1-5
P1-6
Vdd supply line P1-12 LS (VCL GND)
ENB active low P1-13 LS (VCL GND)
PWM IN
P1-7
P1-8
C1
10 UF 35V
+5V for IXDB630
external 630 drive
R9
D1
DC BU S
TESTPO INT
10
U F-1007 DIC T
C7
+
C8
C12
C2
. 1UF
. 1UF
2
D3
. 1UF
13
EN B
HGO
8
R2
1
Q2
IXF H7N 90Q
U1
5.11
3
LM78L05 AC Z
. 1UF
+ C10
C13
U3
HS
6
2
GN D
C1 1
10 UF 35V
. 1UF
HS
9
LGO
1
Q2- S
TES TPO INT
C3
.01UF
C5 = 27 pF for IXDP630
12
14
HI N
LI N
LS
LS
2
16
C5 = 22 pF for IXDP631
C6
C5
22PF
C4
. 1UF
27p F (2 2pF )
Y1
C9
. 1UF 1K V
R3
XM/S M
15
EN B
HGO
8
Q1- D
1K / 1M
TES TPO INT
TP 5
1
TP 1
U4
HS
HS
7
10
2
TP 6
JP1
ENAS
1
1
3
5
2
R
S
T
ENAR
U2
TU
TL
SU
13
12
15
TP 2
TP3
TP4
1
Q3
2N 700 0
3
14
16
HI N
LI N
LGO
LS
LS
LS
2
1
4
18
R1
5.11
1
3
Q1
IXF H7N 90 Q
D2
4
ENAS
IXD P630/631
SL
14
1
Q4
R 4 10K
6
ENAT
( Dead Timer )
RU
17
1
2N 7000
3
JP 2
ENAT
7
OUTEN A
RL
16
R 13 jum pered
R 14 open
LS GN D
TESTPOINT
R 5 10K
8
RE SET (ac tiv e low)
R 15 jum pered
R 16 open
Figure 3: EV6R11 PCB Schematic
Schematic Notes:
This is a demonstration PCB and has been designed for flexibility and ease of use. The
schematic shows all options but does not mean the PCB is configured as such when ordered. The
PCB will be loaded with either the IX6R11S3 16 pin SOIC package (U3) OR the IX6R11S6 18 pin
SOIC package with heat sink tab (U4). The free-wheeling diodes, D2 and D3, are also not included
but can be installed if IGBTs are used.
Ordering:
EV6R11S3
EV6R11S6
PCB with IX6R11S3 16 pin SOIC IC package
PCB with IX6R11S6 18 pin SOIC IC package with heat tab
2
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